Name: Workshop Accelerated Computing For Fusion
Start: 2016-11-28T14:00:00+01:00
End: 2016-11-29T18:00:00+01:00
Location: Maidon de la Simulation

Workshop Accelerated Computing For Fusion

de lundi 28 novembre 2016 (14:00) à mardi 29 novembre 2016 (18:00)

lundi 28 novembre 2016
15:00
15:00 - 16:45
Room: 34
Contributions

15:10 Processors Evolution - Guillaume Colin de Verdière (CEA)

15:40 Towards Intelligent Linear Algebra Methods and Multi-Level Computing - Serge Petiton (CNRS & MdlS)
mardi 29 novembre 2016
09:00
09:00 - 12:00
Room: 34
Contributions

09:30 Optimization of fusion kernels on accelerators (remote from Japan) - Yuuichi ASAHI (CEA & JAEA)

10:00 HPC Architectures Evolution : the case of Marconi, the new CINECA flagship system - Piero LANUCARA (CINECA)

10:30 Efficient Parallel Programming on Xeon Phi for Exascale - Eric PETIT (INTEL)

11:30 HLST/CINCOMP experience with new architectures : moving from helios to marconi - Serhiy MOCHALSKYY (HLST)
14:00
14:00 - 17:35
Room: 34
Contributions

14:00 French accelerator technological watch experience - Gabriel HAUTREUX (GENCI)

14:30 NVIDIA accelerators experience and vision - François COURTEILLE (NVIDIA)

15:00 BULL experience with accelerators and Exascale Vision - Jean-Pierre PANZIERA (ATOS/Bull)

16:00 Panel : new issues and future directions in accelerated HPC

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